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To meet the ever-growing need for performance in silicon devices, SoCproviders have been increasingly relying on software-hardware cooperation. Bycontrolling hardware resources such as power or clock management from thesoftware, developers earn the possibility to build more flexible and powerefficient applications. Despite the benefits, these hardware components are nowexposed to software code and can potentially be misused as open-doors tojeopardize trusted environments, perform privilege escalation or stealcryptographic secrets. In this work, we introduce SideLine, a novelside-channel vector based on delay-line components widely implemented inhigh-end SoCs. After providing a detailed method on how to access and convertdelay-line data into power consumption information, we demonstrate that theseentities can be used to perform remote power side-channel attacks. We reportexperiments carried out on two SoCs from distinct vendors and we recountseveral core-vs-core attack scenarios in which an adversary process located inone processor core aims at eavesdropping the activity of a victim processlocated in another core. For each scenario, we demonstrate the adversaryability to fully recover the secret key of an OpenSSL AES running in the victimcore. Even more detrimental, we show that these attacks are still practicableif the victim or the attacker program runs over an operating system.

SideLine: How Delay-Lines (May) Leak Secrets from your SoC